“Ceremorphic is the first company to tape out an AI supercomputing chip in the advanced 5nm process node, representing not only a significant accomplishment for our company, but also for the India semiconductor industry,” said Dr. Venkat Mattela, Founder and CEO of Ceremorphic. “The talent pool, expertise and resulting innovation coming from India has once again proven to be world-class and this design achievement positions us well for our next phase of growth and expansion.”
“With this announcement, the AI industry just got one step closer to finally addressing today’s critical challenges through reliable performance computing,” said Subhasish Mitra, Professor of Electrical Engineering and of Computer Science at Stanford University. “Congratulations to the entire Ceremorphic team for achieving this significant milestone and bringing a new level of innovation to the AI supercomputing community.”
About the Ceremorphic Architecture
The Ceremorphic chip contains reliable analog and digital circuits, very high speed (64Gbit, PCIe 6.0) and energy efficient connectivity circuits for system level and inter-node communications, multi-thread reliable processor and low power circuits for SoC silicon. This Hierarchical Learning Processor (HLP) deploys the right processing system for optimal power performance operation. Key features of the chip include the following:
- Patented Multi-thread processing macro-architecture, ThreadArch® based RISC –V® processor for proxy processing (1GHz)
- Custom designed X16 PCIe 6. 0 / CXL 3.0 connectivity interface
- Reliability system components realized in advanced microarchitectures
Ceremorphic in India
Ceremorphic’s development center in India currently employs more than 150 hardware and software engineers with plans to grow to 250 by 2023. Earlier this year, the company announced a $50 million Series A round and plans to innovate the AI supercomputing space with an energy efficient, high performance chip architecture.
